1. Field of the Invention
This invention is directed to field effect transistors, and especially to field effect transistors for power applications and in which the transistor gate is located in a trench in a substrate having a lightly doped epitaxial layer at the principal surface of the substrate.
2. Description of the Prior Art
DMOS transistor (double diffused MOS transistors) are well known as a type of field effect transistor. A typical such transistor shown in FIG. 1 includes a substrate 10 doped N+, an epitaxial layer 14 formed thereon doped N-, a body region 16 doped P, and a source region 20 doped N+. The gate electrode 22 is typically conductive polysilicon formed in a trench 24 which may be V-shaped, U-shaped, or a truncated V as shown in FIG. 1. The source contacts 26 short the body region 16 to the source region 20, and the drain contact 30 is formed on the substrate 10 backside. The channel length designated by X is the length of the P body region 16 adjacent to the gate electrode 22. It is to be understood that the structure of FIG. 1 is illustrative; in other devices which are also well known, the trench 24 is completely filled with the gate electrode 22, thus establishing a planar principal surface.
It is considered critical to the performance of such a device that a narrow channel be available. The channel region of such a device is the P body diffusion. To achieve low channel resistance, this region is kept short. It is important that the trench extends slightly beyond the depth of the P body region.
It is known that undesirably very high electric fields form at the bottom of the trench, resulting in a significant reduction in the breakdown voltage. That is to say, when such a device is operated at high voltage, the sharp corners inside the etched trench make reliable high voltage performance difficult due to local electric fields.
That is to say, in such a device, a high electric field around the bottom corners of the trench (also called a groove) causes premature device breakdown. This breakdown can damage the gate oxide layer and even result in permanent damage to the device. It would be highly desirable to overcome this shortcoming to achieve higher breakdown voltage without excessively increasing source-drain on resistance (RDSON).